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Higher Education Technical Challenges Hub: Module Specification

ICT09M2 – Digital Design (FPGA)

pdf version of module specification

Download the module specification

pdf version of module specification








Module name:

Digital Design (FPGA)

Scope and form:

Duration (weeks; Hours/week):

15 weeks, 4h/week

Type of assessment:

Individual project work and end of semester examination

Qualified Prerequisites:

BSc in informatics or equivalent which has included an introduction to digital signals/circuits and at least one software programming language.

General module objectives:

This module is aimed to provide an introduction to digital circuit and system design using the field programmable gate array (FPGA) with the objectives to provide:
1.A review of digital logic (combinational logic, synchronous sequential logic and memories) and design techniques (Boolean logic, Karnaugh maps and counter/state machine design). It is expected that anyone studying this module will be familiar with digital signals and basic logic gates.
2.An introduction to programmable logic and the different types of programmable logic available will be identified with a focus on the FPGA.
3.An understanding of different FPGA design entry techniques and design flows.
4.An introduction to hardware description languages (VHDL and Verilog-HDL) and design description levels (behavioural, RTL, structural). Design of digital circuits and systems using Verilog-HDL.
5.The application of the FPGA to ICT in particular how the FPGA can be used in ICT data processing and security applications.
6.An introduction for advanced FPGA circuit and system design using embedded intellectual property (IP) cores, memories and software programmed processors.

Topics and short description:

The module is divided into four parts. The first three parts consist of the introduction of theory. The fourth part consists of an individual student project.

1. Introduction to digital design and programmable logic
Review of combinational logic circuit design, synchronous sequential logic circuit design (counters and state machines (Mealy and Moore machines), Boolean logic, Karnaugh maps and different types of memory.
Programmable logic: programmable logic device (PLD), programmable logic array (PLA), complex programmable logic device (CPLD), field programmable gate array (FPGA). Programmable logic architectures, hardware resources and applications.
The difference between hardware configured programmable logic and software programmed processors (microcontrollers, microprocessors and digital signal processors).
Design of digital circuits and systems using programmable logic: design flows; schematics, hardware description language (HDL). Introduction to the advanced topics (elaborated in section 3). Synthesis. Elaboration and simulation. Place and route. Adding design constraints (pin placement and timing).
I/O configuration and standards. Pin assignment. Digital input and output: voltages and logic levels. Noise margin.

2. Design of digital and mixed-signal systems using the field programmable gate array (FPGA)
FPGA vendors, available FPGA types and design tools.
Introduction to Verilog-HDL for FPGA design entry: behavioural, register transfer level (RTL) and structural coding techniques.
Digital signal processing (DSP) applications. Digital filtering.
Applications of FPGAs to ICT data processing.
Applications of FPGAs in IT security.
Interfacing the FPGA to external circuitry.

3. Advanced topics:
Selecting the right FPGA for the application.
Embedded IP cores.
Embedded memory (random access memory – RAM).
Embedded processors.
Design of FPGA circuits and systems using HDL design descriptions, IP cores and embedded processors.
Timing constraints.
Digital clock management.
System level considerations; pin assignment for printed circuit boards (PCB) design.

4. Project
Using a chosen FPGA and development board (the FPGA and development board to be chosen by the module provider), an individual project is to be undertaken by each student for an application related to the use of the FPGA in ICT.

The module is based on 2 hours of lectures and 2 hours of laboratories per week along with student self-study time and student project work.

The module assessment is based on the following arrangement:
1.50% - individual student project including a project report and demonstration.
2.50% - end of semester examination.

Learning outcomes:




Understand how digital circuits are designed.

Develop, simulate and synthesise digital circuits developed using Verilog-HDL.

Creating, simulating and synthesising Verilog-HDL descriptions of digital circuits and systems.

Understand the design flows for FPGA based digital designs.

Utilise the FPGA and design tools to design and implement digital circuits.

Ability to select an appropriate FPGA for a particular application requirement.

Ability to write Verilog-HDL modules (design descriptions) and test fixtures (simulation studies).

Undertake personal projects in developing FPGA based designs from concept through to hardware.

Understand the possible use of the FPGA in ICT applications.

Recommended literature:

Peter Ashenden, Digital Design (Verilog): An Embedded Systems Approach Using Verilog, Morgan Kaufmann; 1 edition (26 Oct. 2007), ISBN-10: 0123695279, ISBN-13: 978-0123695277